Richard Solomon has heard the rumblings over the years. As vice president of PCI-SIG, the organization that controls the development of the PCI-Express
Why are they still bolting out new versions, despite v5 already having issues with proximity to the CPU (too high frequency), efficiency and heat dissipation issues to a point the mainboard itself needs fans/fins? Shouldn’t they add some kind of throtling to the protocol, because you don’t always need full speed and climate crysis and all?
At this point, a PCIe 7 mainboard would need to be photonic only to work at all. Or only on SOC designs, but that’s contrary to the usecase of PCIe.
Its the server world that is demanding it. For most consumers 4.0 is more than enough, but servers are already maxing out 5.0 and will probably immediately max out 6.0 when devices actually become available.
Why are they still bolting out new versions, despite v5 already having issues with proximity to the CPU (too high frequency), efficiency and heat dissipation issues to a point the mainboard itself needs fans/fins? Shouldn’t they add some kind of throtling to the protocol, because you don’t always need full speed and climate crysis and all?
At this point, a PCIe 7 mainboard would need to be photonic only to work at all. Or only on SOC designs, but that’s contrary to the usecase of PCIe.
What, you don’t miss the days of motherboards with northbridge fans?
Its the server world that is demanding it. For most consumers 4.0 is more than enough, but servers are already maxing out 5.0 and will probably immediately max out 6.0 when devices actually become available.
I’d be down to have SoCs with PCIe.