RISC V is just an open standard set of instructions and their encodings. It is not expected nor required for implementations of RISC V to be open sourced, but if they do make a RISC V chip they don’t have to pay anyone to have that privilege and the chip will be compatible with other RISC V chips because it is an open and standardized instruction set. That’s the point. Qualcomm pays ARM to make their own chip designs that implement the ARM instruction set, they aren’t paying for off the shelf ARM designs like most ARM chip companies do.
RISC V is just an open standard set of instructions and their encodings. It is not expected nor required for implementations of RISC V to be open sourced, but if they do make a RISC V chip they don’t have to pay anyone to have that privilege and the chip will be compatible with other RISC V chips because it is an open and standardized instruction set. That’s the point. Qualcomm pays ARM to make their own chip designs that implement the ARM instruction set, they aren’t paying for off the shelf ARM designs like most ARM chip companies do.